*/
ia64_ptc_l(machineFwG.ia64_pal_base, PTE_PS_16K);
ia64_write_itr_i(&pte, IA64_TR_PAL,
- (uint64_t) machineFwG.ia64_pal_base, PTE_PS_16K, 0);
+ (uint64_t)machineFwG.ia64_pal_base,
+ PTE_PS_16K, IA64_KEY_REG7);
xen_set_virtual_psr_ic(1);
}
bootverbose = 1;
}
+static void
+set_opt_feature(void)
+{
+ struct xen_ia64_opt_feature optf;
+
+ optf.cmd = XEN_IA64_OPTF_IDENT_MAP_REG7;
+ optf.on = XEN_IA64_OPTF_ON;
+ optf.pgprot = ((1 << PTE_OFF_P) | (1 << PTE_OFF_A) | (1 << PTE_OFF_D) |
+ (PTE_MA_WB << PTE_OFF_MA) |
+ (PTE_PL_KERN << PTE_OFF_PL) |
+ (PTE_AR_RW << PTE_OFF_AR));
+ optf.key = IA64_KEY_REG7;
+ HYPERVISOR_opt_feature(&optf);
+}
+
void
arch_init(start_info_t *si)
{
printk("efi_get_time() failed\n");
registerCallback();
+
+ set_opt_feature();
+
initialized = 1;
}
;;
mov rr[r3]=r2
;;
-
+ /*
+ * Setup protection keys for region 5 and 7.
+ */
+ mov r2=(IA64_KEY_REG5 << IA64_PKR_KEY) | IA64_PKR_VALID
+ mov r3=(IA64_KEY_REG7 << IA64_PKR_KEY) | IA64_PKR_VALID
+ mov r14=0x1
+ ;;
+ mov pkr[r0]=r2 /* Region 5 */
+ mov pkr[r14]=r3 /* Region 7 */
+ ;;
/*
* Now pin mappings into the TLB for kernel text and data
*/
- mov r18=KERNEL_TR_PAGE_SIZE<<IA64_ITIR_PS
+ mov r18=(KERNEL_TR_PAGE_SIZE<<IA64_ITIR_PS)| \
+ (IA64_KEY_REG5<<IA64_ITIR_KEY)
movl r17=KERNEL_START
;;
mov cr.itir=r18
/* xen special handling for possibly lazy cover */
movl r8=XSI_PRECOVER_IFS;
;;
- ld8 r21=[r8];
+ ld8 r21=[r8]
;;
#if defined(BIG_ENDIAN) // swap because mini-os is in BE
mux1 r21=r21,@rev
* addresses. Currently I don't do a check.
*/
movl r20=~((7 << IA64_RR_IDX_POS) | 0xfff)
- movl r18=((PTE_PS_16K<<IA64_ITIR_PS)|(0<<IA64_ITIR_KEY))
+ movl r18=((PTE_PS_16K<<IA64_ITIR_PS)|(IA64_KEY_REG7<<IA64_ITIR_KEY))
;;
movl r19= ((1<<PTE_OFF_P) | (PTE_MA_WB<<PTE_OFF_MA) | \
(1<<PTE_OFF_A) | (1<<PTE_OFF_D) | \
int HYPERVISOR_grant_table_op(unsigned int cmd, void *uop, unsigned int count);
+static inline int
+HYPERVISOR_opt_feature(void *arg)
+{
+ struct xencomm_handle *new_arg;
+
+ new_arg = xencomm_create_inline(arg);
+
+ return _hypercall1(int, opt_feature, new_arg);
+}
+
#endif /* __HYPERCALL_H__ */
#define MOS_IA64_PSR_BE 0
#endif
-#define STARTUP_PSR (IA64_PSR_IT | \
+#define STARTUP_PSR (IA64_PSR_IT | IA64_PSR_PK | \
IA64_PSR_DT | IA64_PSR_RT | MOS_IA64_PSR_BE | \
IA64_PSR_BN | IA64_PSR_CPL_KERN | IA64_PSR_AC)
#define KERN_VIRT_2_PHYS(x) (((x) - KERNEL_START) + \
(1 << KERNEL_PHYS_START_SHIFT))
+/* Some protection keys for region 5 and 7 addresses. */
+#define IA64_KEY_REG7 0x234 /* Region 7 - identity mapped addresses */
+#define IA64_KEY_REG5 0x89a /* Region 5 - kernel addresses */
+
// This is xen specific !
#define PAGE_SHIFT_XEN_16K 14 // For 16KB page size
#define mfn_to_virt(mfn) ((void*)__va((mfn) << PAGE_SHIFT_XEN_16K))